Public Announcement Phone

Experiment 7

Public Announcement Phone

Objectives:

 

Design a circuit for a 1-to-8 demultiplexer. Use Quartus II and the DE2 Board to verify that your schematic design meets your expected truth table. Build the circuit using the Proto-Board and have its functionality verified by an instructor. As homework, complete the VHDL code that will implement the same outputs as your schematic design.

 

Software/Hardware:

 

Altera Quartus II Software

Altera DE2 Development and Education Board

Proto-Board

① 74138

Wire Strippers

Wire

 

Information:

 

Imagine you are a mall security guard. In your office is a public announcement (PA) phone. The PA has a microphone on/off switch (IN) and three dialing buttons (S2, S1, S0) which are used to select which of the eight different speakers is connected to the input, as shown below. When you make an announcement, you get to choose which section of the mall hears your announcement based on the buttons you press. For example, if you press S2 and S1 and start speaking into the phone, the Food Court (D6) is the only place that can hear you. Likewise, if you were to only press S2 then the Appliance Store (D4) is the only place that can hear you.

Such a public announcement phone (or PA system) is an example of a 1-to-8 demux. Since the phone has three buttons each of which can either be in one of two possible states (pressed or not pressed), then the phone can dial eight possible different numbers.

  Figure 7.1 PA Diagram

Procedure:

PRE-LAB

Writing SOP Epressions

The DE2 Board pushbuttons are configured so that when you press the push button it will be a “0” and when the button is not pressed it is a “1”. The block diagram  in Figure 7.2 is shown below. The select lines are active low and the outputs are active high. You will notice that there is an additional input called “IN”. Think of this input as an on/off switch for the microphone of the PA system that can be fed to each location based on your selections of S2, S1, and S0. The truth table that describes the announcement switching system is shown in Figure 7.3.

 

 

 

 

 

Figure 7.2 Block Diagram

The truth table in Figure 7.3 is for the above demux, based on the pushbutton wiring (active low) and the output specifications (active high).

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 7.3 Expected Truth Table

 

To solve this problem, the next step is to write the SOP expression for each of the 8 outputs. Remember to keep in mind the on/off switch of the microphone.

 

For example:

D6  =  IN S2’ S1’ S0              Both inputs S2 and S1 must be pressed.

D5  =  IN S2’ S1 S0’              Both inputs S2 and S0 must be pressed.

 

Write the remaining SOP expressions. Draw a schematic design using Quartus II that will implement the expected outputs. Download your program to the DE2 Board and verify that the outputs meet the expected truth table. Functionality of your schematic design will be checked by an instructor at the beginning of the lab period. Include an image of your schematic in your lab report.

 

PIN SELECTION

 

 

 

Figure 7.4 DE2 Board

 

Choose the following Pin Assignments for your schematic design:

 

 

LAB

Using the proper ICs, implement the circuit of the 1-to-8 demultiplexer using the Proto-Board. Instead of pushbuttons, only use switches on the Proto-Board. You have until the end of the lab period to complete your circuit and have it verified by an instructor.

Pay close attention to the enable inputs of this particular IC. (Answer questions in report)

  1. Are they active high/active low? Which ones?
  2. What enable combination allows for all outputs?
  3. What is the purpose of an enable signal? Give a “real life” example of what we might use an enable signal for.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Conclusion:

Using the WHEN – SELECT Statements to solve the VHDL code.

Another method (When-Select) can be used in the VHDL code to accomplish the same as the SOP methods we have used in previous labs. Use the following 1-to-4 demux VHDL code in Figure 7.5 as an example to create your 1-to-8 demux VHDL code. Include an image of your VHDL code in your formal report. Should include name and date as a comment in the code.

Figure 7.5 VHDL Code

 

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